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ASPDAC
2001
ACM
105views Hardware» more  ASPDAC 2001»
15 years 10 months ago
Toward better wireload models in the presence of obstacles
Wirelength estimation techniques typically contain a site density function that enumerates all possible path sites for each wirelength in an architecture and an occupation probabil...
Chung-Kuan Cheng, Andrew B. Kahng, Bao Liu, Dirk S...
ICC
2007
IEEE
104views Communications» more  ICC 2007»
16 years 1 months ago
A Novel Graph Model for Maximum Survivability in Mesh Networks under Multiple Generic Risks
— This paper investigates the path protection problem in mesh networks under multiple generic risks. Disjoint logical links may fail simultaneously if they share the same compone...
Qingya She, Xiaodong Huang, Jason P. Jue
IBMRD
2006
76views more  IBMRD 2006»
15 years 6 months ago
Modeling wire delay, area, power, and performance in a simulation infrastructure
We present Justice, a set of extensions to the Liberty simulation infrastructure that model area, wire length, and power consumption in processor architectures. Given an architectu...
Nicholas P. Carter, Azmat Hussain
ENTCS
2007
115views more  ENTCS 2007»
15 years 6 months ago
A Global Algorithm for Model-Based Test Suite Generation
Abstract. Model-based testing has been proposed as a technique to automatically verify that a system conforms to its specification. A popular approach is to use a model-checker to...
Anders Hessel, Paul Pettersson
ICML
1997
IEEE
16 years 7 months ago
Predicting Multiprocessor Memory Access Patterns with Learning Models
Machine learning techniques are applicable to computer system optimization. We show that shared memory multiprocessors can successfully utilize machine learning algorithms for mem...
M. F. Sakr, Steven P. Levitan, Donald M. Chiarulli...