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CAV
2004
Springer
101views Hardware» more  CAV 2004»
15 years 11 months ago
Symbolic Model Checking of Non-regular Properties
This paper presents a symbolic model checking algorithm for Fixpoint Logic with Chop, an extension of the modal µ-calculus capable of defining non-regular properties. Some empiri...
Martin Lange
CODES
2002
IEEE
15 years 11 months ago
Symbolic model checking of Dual Transition Petri Nets
This paper describes the formal verification of the recently introduced Dual Transition Petri Net (DTPN) models [12], using model checking techniques. The methodology presented a...
Mauricio Varea, Bashir M. Al-Hashimi, Luis Alejand...
FSTTCS
2006
Springer
15 years 9 months ago
On Decidability of LTL Model Checking for Process Rewrite Systems
We establish a decidability boundary of the model checking problem for infinite-state systems defined by Process Rewrite Systems (PRS) or weakly extended Process Rewrite Systems (w...
Laura Bozzelli, Mojmír Kretínsk&yacu...
RE
2001
Springer
15 years 10 months ago
Events and Constraints: A Graphical Editor for Capturing Logic Requirements of Programs
A logic model checker can be an effective tool for debugging software applications. A stumbling block can be that model checking tools expect the user to supply a formal statement...
Margaret H. Smith, Gerard J. Holzmann, Kousha Etes...
FPGA
2007
ACM
142views FPGA» more  FPGA 2007»
16 years 2 days ago
Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...
N. Pete Sedcole, Peter Y. K. Cheung