Sciweavers

2661 search results - page 176 / 533
» Model Checking Performability Properties
Sort
View
VLSID
2010
IEEE
155views VLSI» more  VLSID 2010»
15 years 4 months ago
Synchronized Generation of Directed Tests Using Satisfiability Solving
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Xiaoke Qin, Mingsong Chen, Prabhat Mishra
INFOCOM
2003
IEEE
15 years 11 months ago
IMPORTANT: A framework to systematically analyze the Impact of Mobility on Performance of RouTing protocols for Adhoc NeTworks
— A Mobile Ad hoc Network (MANET) is a collection of wireless mobile nodes forming a temporary network without using any existing infrastructure. Since not many MANETs are curren...
Fan Bai, Narayanan Sadagopan, Ahmed Helmy
PLDI
2006
ACM
16 years 13 days ago
Termination proofs for systems code
Program termination is central to the process of ensuring that systems code can always react. We describe a new program termination prover that performs a path-sensitive and conte...
Byron Cook, Andreas Podelski, Andrey Rybalchenko
SAC
2009
ACM
16 years 1 months ago
Network protocol interoperability testing based on contextual signatures and passive testing
This paper presents a methodology for interoperability testing based on contextual signatures and passive testing with invariants. The concept of contextual signature offers a fra...
Fatiha Zaïdi, Emmanuel Bayse, Ana R. Cavalli
ISCA
2012
IEEE
232views Hardware» more  ISCA 2012»
13 years 9 months ago
RADISH: Always-on sound and complete race detection in software and hardware
Data-race freedom is a valuable safety property for multithreaded programs that helps with catching bugs, simplifying memory consistency model semantics, and verifying and enforci...
Joseph Devietti, Benjamin P. Wood, Karin Strauss, ...