In this paper, we present a new capacitance extraction method named Dimension Reduction Technique (DRT) for 3D VLSI interconnects. The DRT converts a complex 3D problem into a ser...
Wei Hong II, Weikai Sun, Zhenhai Zhu, Hao Ji, Ben ...
This paper presents a model for concurrent programming, where programs (concurrent program structures) are represented as composition expressions over component programs with suita...
A physically compact, low cost, high performance 3D graphics accelerator is presented. It supports shaded rendering of triangles and antialiased lines into a double-buffered 24-bi...
This paper describes the design and implementation of IRIS Performer, a toolkit for visual simulation, virtual reality, and other real-time 3D graphics applications. The principal...
Abstract. Automatic storage management is important in highly parallel programming environments where large numbers of objects and processes are being constantly created and discar...
Nalini Venkatasubramanian, Gul Agha, Carolyn L. Ta...