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ICPADS
2006
IEEE
16 years 25 days ago
Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...
ICPADS
2006
IEEE
16 years 25 days ago
XYZ: A Scalable, Partially Centralized Lookup Service for Large-Scale Peer-to-Peer Systems
Peer-to-Peer (P2P) systems are characterized by direct access between peer computers, rather than through a centralized server. File sharing is the dominant P2P application on the...
Jianying Zhang, Jie Wu
ISPDC
2006
IEEE
16 years 24 days ago
Using Overlay Networks to Build Operating System Services for Large Scale Grids
Using grid resources to execute scientific applications requiring a large amount of computing power is attractive but not easy from the user point of view. Vigne is a grid operati...
Emmanuel Jeanvoine, Louis Rilling, Christine Morin...
ISPDC
2006
IEEE
16 years 24 days ago
How to Achieve High Throughput with Dynamic Tree-Structured Coterie
Data replication permits a better network bandwidth utilization and minimizes the effect of latency in large-scale systems such as computing grids. However, the cost of maintainin...
Ivan Frain, Abdelaziz Mzoughi, Jean Paul Bahsoun
CASES
2006
ACM
16 years 23 days ago
High-level languages for small devices: a case study
In this paper we study, through a concrete case, the feasibility of using a high-level, general-purpose logic language in the design and implementation of applications targeting w...
Manuel Carro, José F. Morales, Henk L. Mull...
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