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HPCA
2005
IEEE
16 years 7 months ago
Transition Phase Classification and Prediction
Most programs are repetitive, where similar behavior can be seen at different execution times. Proposed on-line systems automatically group these similar intervals of execution in...
Jeremy Lau, Stefan Schoenmackers, Brad Calder
HPCA
2005
IEEE
16 years 7 months ago
On the Limits of Leakage Power Reduction in Caches
If current technology scaling trends hold, leakage power dissipation will soon become the dominant source of power consumption in high performance processors. Caches, due to the f...
Yan Meng, Timothy Sherwood, Ryan Kastner
HPCA
2005
IEEE
16 years 7 months ago
Effective Instruction Prefetching in Chip Multiprocessors for Modern Commercial Applications
In this paper, we study the instruction cache miss behavior of four modern commercial applications (a database workload, TPC-W, SPECjAppServer2002 and SPECweb99). These applicatio...
Lawrence Spracklen, Yuan Chou, Santosh G. Abraham
HPCA
2005
IEEE
16 years 7 months ago
Characterizing and Comparing Prevailing Simulation Techniques
Due to the simulation time of the reference input set, architects often use alternative simulation techniques. Although these alternatives reduce the simulation time, what has not...
Joshua J. Yi, Sreekumar V. Kodakara, Resit Sendag,...
HPCA
2005
IEEE
16 years 7 months ago
A Performance Comparison of DRAM Memory System Optimizations for SMT Processors
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
Zhichun Zhu, Zhao Zhang
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