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ISCAS
2003
IEEE
83views Hardware» more  ISCAS 2003»
15 years 11 months ago
Low-noise low-power allpole active-RC filters minimizing resistor level
The design procedure of 2nd - and 3rd -order low-sensitivity lowpower allpole active resistance-capacitance (RC) filters, using the impedance tapering design method has already be...
Drazen Jurisic, George S. Moschytz, Neven Mijat
TCAD
2008
119views more  TCAD 2008»
15 years 6 months ago
FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design
Abstract-- In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT) algorithm called FLUTE. FLUTE is based on pre-computed lookup table to make RS...
Chris C. N. Chu, Yiu-Chung Wong
SIGPRO
2002
80views more  SIGPRO 2002»
15 years 6 months ago
Design of optimum high-order finite-wordlength digital FIR filters with linear phase
Abstract-A novel iterative quantization procedure for the design of finite wordlength linear phase FIR filters of high order and minimum frequency domain error is proposed: a one b...
Gennaro Evangelista
DAC
1997
ACM
15 years 10 months ago
CLIP: An Optimizing Layout Generator for Two-Dimensional CMOS Cells
We present a novel technique CLIP for optimizing both the height and width of CMOS cell layouts in the two-dimensional (2D) style. CLIP is based on integer-linear programming (ILP...
Avaneendra Gupta, John P. Hayes
ICPP
1993
IEEE
15 years 10 months ago
Closed Form Solutions for Bus and Tree Networks of Processors Load Sharing A Divisible Job
Optimal load allocation for load sharing a divisible job over processors interconnected in either a bus or a tree network is considered. The processors are either equipped with fro...
Sameer M. Bataineh, Te-Yu Hsiung, Thomas G. Robert...