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191
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DATE
2002
IEEE
16 years 5 days ago
2002
IEEE
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...
199
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ISSRE
2002
IEEE
16 years 4 days ago
2002
IEEE
In this paper, based on software reliability growth models with generalized logistic testing-effort function, we study three optimal resource allocation problems in modular softwa...
182
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LCN
1999
IEEE
15 years 11 months ago
1999
IEEE
In Wireless ATM networks, user connections need to be rerouted during handoff as mobile users move among base stations. The rerouting of connections must be done quickly with mini...
199
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PG
1999
IEEE
15 years 11 months ago
1999
IEEE
In this paper we introduce a mesh approximation method that uses a volume-based metric. After a geometric simplification, we minimize the volume between the simplified mesh and th...
190
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ICCAD
1998
IEEE
15 years 11 months ago
1998
IEEE
This paper considers simultaneous gate and wire sizing for general very large scale integrated (VLSI) circuits under the Elmore delay model. We present a fast and exact algorithm w...