5506 search results - page 694 / 1102 » Minimal Logic Programs |
173
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ASPDAC
2004
ACM
16 years 6 days ago
2004
ACM
As gate delays decrease faster than wire delays for each technology generation, buffer insertion becomes a popular method to reduce the interconnect delay. Several modern buffer in...
200
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DAC
1999
ACM
15 years 11 months ago
1999
ACM
As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
196
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WSC
2000
15 years 8 months ago
2000
Computation of power control calculations is one of the most time-consuming aspects of simulating wireless communication systems. These calculations are critical to understanding ...
180
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GLOBECOM
2008
IEEE
15 years 7 months ago
2008
IEEE
In this paper, we first provide a joint source and channel coding (JSCC) approach in estimating Gaussian sources over Gaussian MAC channels, as well as its sufficient and necessary...
167
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CVIU
2008
15 years 6 months ago
2008
In this paper we introduce a novel method to address minimization of static and dynamic MRFs. Our approach is based on principles from linear programming and, in particular, on pr...