5506 search results - page 686 / 1102 » Minimal Logic Programs |
150
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VLSID
1997
IEEE
15 years 11 months ago
1997
IEEE
An exclusive-OR transform of input variables significantly reduces the size of the PLA implementation for adder and comparator circuits. For n bit adder circuits, the size of PLA ...
170
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EURODAC
1994
IEEE
15 years 11 months ago
1994
IEEE
In this paper we introduce a new knowledgebased method for planning and managing the VLSI design process, based on prediction and advice, that minimizes search in a wide design sp...
179
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DSOM
2006
Springer
15 years 10 months ago
2006
Springer
When different wireless networks come in close proximity there is often a need for them to logically combine, or compose. We focus on a known research problem particularly in Ambie...
199
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ASPDAC
1995
ACM
15 years 10 months ago
1995
ACM
— The goal of transistor reordering for a logic gate is to reduce the propagation delay as well as the charging and discharging of internal capacitances to achieve low power cons...
188
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ISAAC
1995
Springer
15 years 10 months ago
1995
Springer
Ordered Binary-Decision Diagrams (OBDD) are the state-of-the-art data structure for boolean function manipulation and there exist several software packages for OBDD manipulation. ...