5506 search results - page 670 / 1102 » Minimal Logic Programs |
180
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DAC
2006
ACM
16 years 24 days ago
2006
ACM
Several emerging Design-for-Debug (DFD) methodologies are addressing silicon debug by making internal signal values and other data observable. Most of these methodologies require ...
178
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ATS
2000
IEEE
15 years 11 months ago
2000
IEEE
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
223
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JELIA
1994
Springer
15 years 11 months ago
1994
Springer
: In this paper we describe a general way of formalizing reasoning behaviour. Such a behaviour may be described by all the patterns which are valid for the behaviour. A pattern can...
168
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DIAGRAMS
2006
Springer
15 years 10 months ago
2006
Springer
The intuitive properties of configurations of planar non-overlapping closed curves (boundaries) are presented as a pure boundary mathematics. The mathematics, which is not incorpor...
185
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DAC
1995
ACM
15 years 10 months ago
1995
ACM
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...