5506 search results - page 657 / 1102 » Minimal Logic Programs |
156
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
In this paper, we propose a hierarchical timing-driven Steiner tree algorithm for global routing which considers the minimization of timing delay during the tree construction as t...
169
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ACCV
2009
Springer
16 years 1 months ago
2009
Springer
In this paper, we propose a convex optimization based approach for piecewise planar reconstruction. We show that the task of reconstructing a piecewise planar environment can be se...
160
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ICCCN
2007
IEEE
16 years 1 months ago
2007
IEEE
—In this paper, we show that minimizing the product of path lengths results in minimizing the probability of connection failure between a source and destination given two links h...
165
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DATE
2006
IEEE
16 years 27 days ago
2006
IEEE
The allocation of device variables on I/O registers affects the code size and performance of an I/O device driver. This work seeks the allocation with the minimal software or hard...
167
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SCALESPACE
2005
Springer
16 years 9 days ago
2005
Springer
We study the connection between higher order total variation (TV) regularization and support vector regression (SVR) with spline kernels in a one-dimensional discrete setting. We p...