5506 search results - page 600 / 1102 » Minimal Logic Programs |
180
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SPIN
2007
Springer
16 years 1 months ago
2007
Springer
Abstract. We present an approach for the veri cation of spatial properties with Spin. We rst extend one of Spin's main property speci cation mechanisms, i.e., the linear-time...
186
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FPGA
2005
ACM
16 years 14 days ago
2005
ACM
Logic duplication is an effective method for improving circuit performance. In this paper we present an algorithm named SPD that performs simultaneous placement and duplication to...
171
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PATMOS
2005
Springer
16 years 13 days ago
2005
Springer
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
171
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WECWIS
2002
IEEE
15 years 12 months ago
2002
IEEE
In the web context, it is difficult to disentangle presentation from process logic, and sometimes even data is not separate from the presentation. Consequently, it becomes to de...
211
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DATE
2000
IEEE
15 years 11 months ago
2000
IEEE
Novel methodology and algorithms to seamlessly integrate logic synthesis and physical placement through a transformational approach are presented. Contrary to most placement algor...