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ISCA
1997
IEEE
135views Hardware» more  ISCA 1997»
15 years 10 months ago
The Design and Analysis of a Cache Architecture for Texture Mapping
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
Ziyad S. Hakura, Anoop Gupta
EGH
2004
Springer
15 years 11 months ago
A flexible simulation framework for graphics architectures
In this paper we describe a multipurpose tool for analysis of the performance characteristics of computer graphics hardware and software. We are developing Qsilver, a highly conï¬...
Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron
EUROPAR
2001
Springer
15 years 10 months ago
VIA Communication Performance on a Gigabit Ethernet Cluster
As the technology for high-speed networks has evolved over the last decade, the interconnection of commodity computers (e.g., PCs and workstations) at gigabit rates has become a re...
Mark Baker, Paul A. Farrell, Hong Ong, Stephen L. ...
RTSS
1989
IEEE
15 years 10 months ago
A Distributed Fault Tolerant Architecture for Nuclear Reactor Control and Safety Functions
A new fault tolerant architecture that provides tolerance to a broad scope of hardware, software, and communications faults is being developed. This architecture relies on widely ...
Myron Hecht, J. Agron, S. Hochhauser
IPPS
1999
IEEE
15 years 10 months ago
Non-Preemptive Scheduling of Real-Time Threads on Multi-Level-Context Architectures
The rapid progress in high-performance microprocessor design has made it di cult to adapt real-time scheduling results to new models of microprocessor hardware, thus leaving an un...
Jan Jonsson, Henrik Lönn, Kang G. Shin