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ICCD
2006
IEEE
137views Hardware» more  ICCD 2006»
16 years 3 months ago
Reduction of Crosstalk Pessimism using Tendency Graph Approach
— Accurate estimation of worst-case crosstalk effects is critical for a realistic estimation of the worst-case behavior of deep sub-micron circuits. Crosstalk analysis models usu...
Murthy Palla, Klaus Koch, Jens Bargfrede, Manfred ...
ICCD
2005
IEEE
100views Hardware» more  ICCD 2005»
16 years 3 months ago
Temporal Decomposition for Logic Optimization
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
Nathan Kitchen, Andreas Kuehlmann
ICCD
2003
IEEE
147views Hardware» more  ICCD 2003»
16 years 3 months ago
Design Flow Enhancements for DNA Arrays
DNA probe arrays have recently emerged as one of the core genomic technologies. Exploiting analogies between manufacturing processes for DNA arrays and for VLSI chips, we demonstr...
Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu ...
ICCAD
2008
IEEE
110views Hardware» more  ICCAD 2008»
16 years 3 months ago
NTHU-Route 2.0: a fast and stable global router
—We present in this paper a fast and stable global router called NTHU-Route 2.0 that improves the solution quality and runtime of a state-of-the-art router, NTHU-Route, by the fo...
Yen-Jung Chang, Yu-Ting Lee, Ting-Chi Wang
ICCAD
2006
IEEE
150views Hardware» more  ICCAD 2006»
16 years 3 months ago
Conjoining soft-core FPGA processors
Soft-core programmable processors on field-programmable gate arrays (FPGAs) can be custom synthesized to instantiate only those hardware units, such as multipliers and floating-po...
David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. ...
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