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167
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ISQED
2006
IEEE
90views Hardware» more  ISQED 2006»
16 years 20 days ago
Transaction Level Error Susceptibility Model for Bus Based SoC Architectures
System on Chip architectures have traditionally relied upon bus based interconnect for their communication needs. However, increasing bus frequencies and the load on the bus calls...
Ing-Chao Lin, Suresh Srinivasan, Narayanan Vijaykr...
139
Voted
MM
2006
ACM
93views Multimedia» more  MM 2006»
16 years 18 days ago
Variations 10b: a digital realization of cage's variations II
Beginning in the middle of the twentieth century, composers of experimental music developed a number of new notational representations, most often falling under the category of gr...
Nicholas Knouf
SCESM
2006
ACM
266views Algorithms» more  SCESM 2006»
16 years 18 days ago
A comparative survey of scenario-based to state-based model synthesis approaches
Model Driven Development and Use Case Driven Development methodologies have inspired the proposal of a variety of software engineering approaches that synthesize statebased models...
Hongzhi Liang, Jürgen Dingel, Zinovy Diskin
ETFA
2005
IEEE
16 years 8 days ago
Designing usable decision support systems for HVM
In High Volume Manufacturing (HVM), system control is shared between automation and human workers. The social organisation of workers plays an important role in supporting human d...
Connor Upton, Gavin Doherty
WOSP
2005
ACM
16 years 6 days ago
Run-time performance management of the Siena publish/subscribe middleware
Recently, growing attention is focused on run-time management of Quality of Service (QoS) of complex software systems. In this context, self-adaptation of applications, based on r...
Mauro Caporuscio, Antinisca Di Marco, Paola Invera...