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» MetaCores: Design and Optimization Techniques
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ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
15 years 12 months ago
Low-power fanout optimization using multiple threshold voltage inverters
This paper addresses the problem of low-power fanout optimization with multiple threshold voltage inverters. Introducing splitting and merging conversions that preserve delay, pow...
Behnam Amelifard, Farzan Fallah, Massoud Pedram
ICIP
2009
IEEE
16 years 7 months ago
Architecture Design Of A High-performance Dual-symbol Binary Arithmetic Coder For Jpeg2000
The embedded-block coding with optimized truncation (EBCOT), which consists of a bit-plane coder (BPC) and a binary arithmetic coder (BAC), is the bottleneck in realizing a high-p...
JCSS
2008
138views more  JCSS 2008»
15 years 6 months ago
Reducing mechanism design to algorithm design via machine learning
We use techniques from sample-complexity in machine learning to reduce problems of incentive-compatible mechanism design to standard algorithmic questions, for a broad class of re...
Maria-Florina Balcan, Avrim Blum, Jason D. Hartlin...
GLVLSI
2009
IEEE
143views VLSI» more  GLVLSI 2009»
15 years 10 months ago
Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO
In this paper, we present the design of a P4 (Power-PerformanceProcess-Parasitic) aware voltage controlled oscillator (VCO) at nanoCMOS technologies. Through simulations, we have ...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
DAC
1999
ACM
16 years 7 months ago
Simultaneous Circuit Partitioning/Clustering with Retiming for Performance Optimization
Partitioning and clustering are crucial steps in circuit layout for handling large scale designs enabled by the deep submicron technologies. Retiming is an important sequential lo...
Jason Cong, Honching Li, Chang Wu