2078 search results - page 232 / 416 » MetaCores: Design and Optimization Techniques |
194
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ISSS
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
188
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SIGMOD
2010
ACM
15 years 6 months ago
2010
ACM
The performance of a database system depends strongly on the layout of database objects, such as indexes or tables, onto the underlying storage devices. A good layout will both ba...
178
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LPNMR
2009
Springer
2009
Springer
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
16 years 1 months ago
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
183
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FPGA
2010
ACM
16 years 3 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
200
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CODES
2006
IEEE
16 years 20 days ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...