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» MetaCores: Design and Optimization Techniques
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DAC
2008
ACM
16 years 7 months ago
Scan chain clustering for test power reduction
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
DAC
2001
ACM
16 years 7 months ago
Watermarking Graph Partitioning Solutions
Trends in the semiconductor industry towards extensive design and code reuse motivate a need for adequate Intellectual Property Protection (IPP) schemes. We offer a new general IP...
Gregory Wolfe, Jennifer L. Wong, Miodrag Potkonjak
ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
16 years 3 months ago
Energy Characterization of Hardware-Based Data Prefetching
This paper evaluates several hardware-based data prefetching techniques from an energy perspective, and explores their energy/performance tradeoffs. We present detailed simulation...
Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Kri...
ISSS
2002
IEEE
103views Hardware» more  ISSS 2002»
15 years 11 months ago
A Symbolic Approach for the Combined Solution of Scheduling and Allocation
Scheduling is widely recognized as a very important step in highlevel synthesis. Nevertheless, it is usually done without taking into account the effects on the actual hardware im...
Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer,...
MICRO
2005
IEEE
144views Hardware» more  MICRO 2005»
16 years 5 days ago
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vi...