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» MetaCores: Design and Optimization Techniques
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VLSID
1999
IEEE
93views VLSI» more  VLSID 1999»
15 years 10 months ago
Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...
Noel Menezes, Chung-Ping Chen
JCP
2008
142views more  JCP 2008»
15 years 6 months ago
QoS Aware Query Processing Algorithm for Wireless Sensor Networks
In sensor networks, continuous query is commonly used for collecting periodical data from the objects under monitoring. This sort of queries needs to be carefully designed, in orde...
Jun-Zhao Sun
DAC
2007
ACM
16 years 7 months ago
Placement of 3D ICs with Thermal and Interlayer Via Considerations
Thermal problems and limitations on interlayer via densities are important design constraints on three-dimensional integrated circuits (3D ICs), and need to be considered during g...
Brent Goplen, Sachin S. Sapatnekar
DAC
2003
ACM
16 years 7 months ago
Multilevel global placement with retiming
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
Jason Cong, Xin Yuan
DAC
2004
ACM
16 years 7 months ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He