2078 search results - page 188 / 416 » MetaCores: Design and Optimization Techniques |
143
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GLVLSI
2009
IEEE
16 years 1 months ago
2009
IEEE
Logic decomposition has been extensively used to optimize the worst-case delay and the area in the technology independent phase. Bi-decomposition is one of the state-of-art techni...
160
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ARITH
2007
IEEE
15 years 10 months ago
2007
IEEE
In this paper we explore the relationship between adder topology and energy efficiency. We compare the energy-delay tradeoff curves of selected 32-bit adder topologies, to determi...
172
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CORR
2004
Springer
15 years 6 months ago
2004
Springer
: The integration of different learning and adaptation techniques to overcome individual limitations and to achieve synergetic effects through the hybridization or fusion of these ...
145
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IPPS
2005
IEEE
16 years 4 days ago
2005
IEEE
This paper presents the design and the implementation of a compiler and runtime infrastructure for automatic program distribution. We are building a research infrastructure that e...
186
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GECCO
2000
Springer
15 years 10 months ago
2000
Springer
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...