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» MetaCores: Design and Optimization Techniques
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ICCAD
2006
IEEE
115views Hardware» more  ICCAD 2006»
16 years 3 months ago
Thermal characterization and optimization in platform FPGAs
Increasing power densities in Field Programmable Gate Arrays (FPGAs) have made them susceptible to thermal problems. The advent of platform FPGAs has further exacerbated the probl...
Priya Sundararajan, Aman Gayasen, Narayanan Vijayk...
VLDB
2004
ACM
92views Database» more  VLDB 2004»
15 years 12 months ago
Write-Optimized B-Trees
Large writes are beneficial both on individual disks and on disk arrays, e.g., RAID-5. The presented design enables large writes of internal B-tree nodes and leaves. It supports b...
Goetz Graefe
ICRA
2002
IEEE
92views Robotics» more  ICRA 2002»
15 years 11 months ago
Resolution Complete Rapidly-Exploring Random Trees
Trajectory design for high-dimensional systems with nonconvex constraints is a challenging problem considered in this paper. Classical dynamic programming is often employed, but c...
Peng Cheng, Steven M. LaValle
DAC
2004
ACM
15 years 10 months ago
Enabling energy efficiency in via-patterned gate array devices
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architecture...
R. Reed Taylor, Herman Schmit
DAC
2003
ACM
15 years 11 months ago
Performance trade-off analysis of analog circuits by normal-boundary intersection
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Guido Stehr, Helmut E. Graeb, Kurt Antreich