2078 search results - page 161 / 416 » MetaCores: Design and Optimization Techniques |
180
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GLVLSI
2005
IEEE
16 years 3 days ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
288
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GECCO
2009
Springer
15 years 4 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
186
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PLDI
2009
ACM
16 years 1 months ago
2009
ACM
Translation validation is a technique for checking that, after an optimization has run, the input and output of the optimization are equivalent. Traditionally, translation validat...
172
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ISPD
2003
ACM
15 years 11 months ago
2003
ACM
This paper studies the optimality, scalability and stability of stateof-the-art partitioning and placement algorithms. We present algorithms to construct two classes of benchmarks...
170
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CODES
2008
IEEE
16 years 29 days ago
2008
IEEE
Body-area sensor network or BAN-based health monitoring is increasingly becoming a popular alternative to traditional wired bio-monitoring techniques. However, most biomonitoring ...