2078 search results - page 150 / 416 » MetaCores: Design and Optimization Techniques |
155
click to vote
HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
188
click to vote
IPSN
2005
Springer
15 years 12 months ago
2005
Springer
— In this paper, we propose a quantizer design algorithm that is optimized for source localization in sensor networks. For this application, the goal is to minimize the amount of...
167
click to vote
AAAI
2010
15 years 8 months ago
2010
In many real world applications, labeled data are usually expensive to get, while there may be a large amount of unlabeled data. To reduce the labeling cost, active learning attem...
143
click to vote
FDL
2005
IEEE
16 years 2 days ago
2005
IEEE
In today’s electronic system-level (ESL) design processes, an early analysis of a system’s communication and nce characteristics is becoming a key challenge. The availability ...
174
click to vote
VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...