2078 search results - page 113 / 416 » MetaCores: Design and Optimization Techniques |
167
click to vote
INFOCOM
2007
IEEE
16 years 21 days ago
2007
IEEE
— In a wireless mesh network (WMN) with a number of stationary wireless routers, the aggregate capacity can be increased when each router is equipped with multiple network interf...
159
click to vote
ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
141
click to vote
TCAD
2008
15 years 6 months ago
2008
Recently, the microprocessor industry is headed in the direction of multicore designs in order to continue the chip performance growth. We investigate buffer insertion, which is a ...
196
click to vote
GLVLSI
2007
IEEE
16 years 22 days ago
2007
IEEE
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
178
click to vote
ITCC
2005
IEEE
15 years 12 months ago
2005
IEEE
Declustering techniques reduce query response times through parallel I/O by distributing data among multiple devices. Most of the research on declustering is targeted at spatial r...