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CODES
2003
IEEE
16 years 5 days ago
Design space minimization with timing and code size optimization for embedded DSP
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...
ISQED
2003
IEEE
96views Hardware» more  ISQED 2003»
16 years 5 days ago
New DFM Approach Abstracts AltPSM Lithography Requirements for sub-100nm IC Design Domains
Approach Abstracts AltPSM Lithography Requirements for sub-100nm IC Design Domains Pradiptya Ghosh, Chung-shin Kang, Michael Sanie and David Pinto Numerical Technologies, 70 West P...
Pradiptya Ghosh, Chung-shin Kang, Michael Sanie, D...
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
16 years 4 days ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
PPOPP
2003
ACM
16 years 4 days ago
Using generative design patterns to generate parallel code for a distributed memory environment
A design pattern is a mechanism for encapsulating the knowledge of experienced designers into a re-usable artifact. Parallel design patterns reflect commonly occurring parallel co...
Kai Tan, Duane Szafron, Jonathan Schaeffer, John A...
COMPSAC
2002
IEEE
15 years 12 months ago
Framework for Goal Driven System Design
Architecture has been identified as a main tool for high quality system development. It encapsulates the earliest design decisions of the system under development. These decisions...
Juha Savolainen, Juha Kuusela
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