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IEEEPACT
2007
IEEE
16 years 28 days ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
ISQED
2007
IEEE
197views Hardware» more  ISQED 2007»
16 years 27 days ago
A Simple Flip-Flop Circuit for Typical-Case Designs for DFM
The deep submicron (DSM) semiconductor technologies will make the worst-case design impossible, since they can not provide design margins that it requires. Research directions sho...
Toshinori Sato, Yuji Kunitake
SIES
2007
IEEE
16 years 27 days ago
Design Space Exploration with Evolutionary Multi-Objective Optimisation
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
Martin Holzer 0002, Bastian Knerr, Markus Rupp
GECCO
2007
Springer
163views Optimization» more  GECCO 2007»
16 years 23 days ago
Supporting free-form design using a component based representation: an overview
This paper reviews the development of an interactive evolutionary design system (IEDS) for conceptual design, which integrates an agent based ‘build and evolve’ approach with ...
Azahar T. Machwe, Ian C. Parmee
DATE
2006
IEEE
111views Hardware» more  DATE 2006»
16 years 20 days ago
Disclosing the LDPC code decoder design space
The design of future communication systems with high throughput demands will become a critical task, especially when sophisticated channel coding schemes have to be applied. LDPC ...
Torben Brack, Frank Kienle, Norbert Wehn
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