In System on Chip (SoC) design, growing design complexity has esigners to start designs at higher abstraction levels. This paper proposes an SoC design methodology that makes full...
Many claims have been made about the consequences of not documenting design rationale. The general perception is that designers and architects usually do not fully understand the ...
Antony Tang, Muhammad Ali Babar, Ian Gorton, Jun H...
The trend to multi-core chip designs presents new challenges for design automation, while the increased reuse of components may offer solutions. This paper describes some of the k...
This paper presents a D/A converter with a 14-bit intrinsic linearity in 0.5?m CMOS technology, which has been designed using a systematic design methodology for current-steering ...
Geert Van der Plas, Jan Vandenbussche, Walter Daem...
Despite the automated refactoring support provided by today's IDEs many program transformations that are easy to conceptualize-such as improving the implementation of a desig...