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» Memory and compiler optimizations for low-power and -energy
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PLDI
2000
ACM
15 years 10 months ago
Field analysis: getting useful and low-cost interprocedural information
We present a new limited form of interprocedural analysis called field analysis that can be used by a compiler to reduce the costs of modern language features such as objectorien...
Sanjay Ghemawat, Keith H. Randall, Daniel J. Scale...
PLDI
1999
ACM
15 years 10 months ago
Enhanced Code Compression for Embedded RISC Processors
This paper explores compiler techniques for reducing the memory needed to load and run program executables. In embedded systems, where economic incentives to reduce both ram and r...
Keith D. Cooper, Nathaniel McIntosh
ESOP
2010
Springer
16 years 3 months ago
Parameterized Memory Models and Concurrent Separation Logic
Formal reasoning about concurrent programs is usually done with the assumption that the underlying memory model is sequentially consistent, i.e. the execution outcome is equivalen...
Rodrigo Ferreira, Xinyu Feng and Zhong Shao
SC
2009
ACM
16 years 27 days ago
Automating the generation of composed linear algebra kernels
Memory bandwidth limits the performance of important kernels in many scientific applications. Such applications often use sequences of Basic Linear Algebra Subprograms (BLAS), an...
Geoffrey Belter, Elizabeth R. Jessup, Ian Karlin, ...
CASES
2007
ACM
15 years 10 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...