354 search results - page 35 / 71 » Memory and compiler optimizations for low-power and -energy |
146
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MICRO
2000
IEEE
15 years 10 months ago
2000
IEEE
Register promotion is an optimization that allocates a value to a register for a region of its lifetime where it is provably not aliased. Conventional compiler analysis cannot alw...
145
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GLVLSI
2008
IEEE
16 years 17 days ago
2008
IEEE
Share of leakage in cache memories is increasing with technology scaling. Studies show that most stored bits in instruction caches are zero, and hence, asymmetric SRAM cells which...
170
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IASTEDSEA
2004
15 years 7 months ago
2004
Java applets run on a Virtual Machine that checks code's integrity and correctness before execution using a module called Bytecode Verifier. Java Card technology allows Java ...
178
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PLDI
2006
ACM
16 years 2 days ago
2006
ACM
The widespread presence of SIMD devices in today’s microprocessors has made compiler techniques for these devices tremendously important. One of the most important and difficul...
145
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ICLP
1993
Springer
15 years 10 months ago
1993
Springer
: Copy avoidance refers to the safe replacement, at compile time, of copying operations by destructive updates in single-assignment languages. Conceptually, the problem can be divi...