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LCN
2006
IEEE
16 years 20 days ago
Minimizing Cache Misses in an Event-driven Network Server: A Case Study of TUX
We analyze the performance of CPU-bound network servers and demonstrate experimentally that the degradation in the performance of these servers under highconcurrency workloads is ...
Sapan Bhatia, Charles Consel, Julia L. Lawall
ISORC
2005
IEEE
16 years 7 days ago
EarlGray: A Component-Based Java Virtual Machine for Embedded Systems
EarlGray is a component-based Java virtual machine (JVM) that can be configured to satisfy various kinds of requirements for building future information appliances and embedded s...
Hiroo Ishikawa, Tatsuo Nakajima
169
Voted
DAC
2009
ACM
15 years 11 months ago
GPU-based parallelization for fast circuit optimization
The progress of GPU (Graphics Processing Unit) technology opens a new avenue for boosting computing power. This work is an attempt to exploit GPU for accelerating VLSI circuit opt...
Yifang Liu, Jiang Hu
MICRO
1998
IEEE
92views Hardware» more  MICRO 1998»
15 years 11 months ago
Predictive Techniques for Aggressive Load Speculation
Load latency remains a significant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Pred...
Glenn Reinman, Brad Calder
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
15 years 11 months ago
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak