3202 search results - page 355 / 641 » Memory access scheduling |
174
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ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
159
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CASES
2001
ACM
15 years 10 months ago
2001
ACM
In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...
227
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ASPLOS
2008
ACM
15 years 8 months ago
2008
ACM
The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Addressing this challenge requires adva...
310
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ASPLOS
2011
ACM
14 years 10 months ago
2011
ACM
Deterministic replay systems record and reproduce the execution of a hardware or software system. In contrast to replaying execution on uniprocessors, deterministic replay on mult...
158
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INFOCOM
2009
IEEE
16 years 1 months ago
2009
IEEE
—When IEEE 802.11 access points (APs) share the same channel in a multi-cell WLAN, their downlink transmissions can interfere. Typically, an AP whose scheduled transmission to so...