3202 search results - page 354 / 641 » Memory access scheduling |
138
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DATE
2005
IEEE
16 years 9 days ago
2005
IEEE
Many SOCs today contain both digital and analog embedded cores. Even though the test cost for such mixed-signal SOCs is significantly higher than that for digital SOCs, most prio...
171
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SUTC
2010
IEEE
15 years 10 months ago
2010
IEEE
—To maximize the communication throughput for wireless sensing systems, designers have attempted various combinations of protocol design and manual code optimization. Although th...
179
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ISCA
2006
IEEE
16 years 21 days ago
2006
IEEE
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
176
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EIT
2008
IEEE
16 years 1 months ago
2008
IEEE
—The rapid growth and pervasive use of embedded systems makes it easier for an adversary to gain physical access to these devices to launch attacks and reverse engineer of the sy...
177
Voted
ISCA
2008
IEEE
16 years 1 months ago
2008
IEEE
Writing shared-memory parallel programs is error-prone. Among the concurrency errors that programmers often face are atomicity violations, which are especially challenging. They h...