3202 search results - page 348 / 641 » Memory access scheduling |
183
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MICRO
2010
IEEE
15 years 1 months ago
2010
IEEE
Abstract--As multicore processors are deployed in mainstream computing, the need for software tools to help parallelize programs is increasing dramatically. Data-dependence profili...
176
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CHI
2011
ACM
14 years 10 months ago
2011
ACM
This paper presents the design, implementation, and evaluation of an interactive tabletop system that supports co-located meeting capture and asynchronous search and review of pas...
199
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ISORC
2008
IEEE
16 years 1 months ago
2008
IEEE
Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled ...
180
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SAS
2004
Springer
16 years 1 days ago
2004
Springer
Array-Range Analysis computes at compile time the range of possible index values for each array-index expression in a program. This information can be used to detect potential out-...
173
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ISLPED
2003
ACM
15 years 12 months ago
2003
ACM
High-performance processors use a large set–associative L1 data cache with multiple ports. As clock speeds and size increase such a cache consumes a significant percentage of t...