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USS
2008
15 years 9 months ago
Lest We Remember: Cold Boot Attacks on Encryption Keys
Contrary to popular assumption, DRAMs used in most modern computers retain their contents for several seconds after power is lost, even at room temperature and even if removed fro...
J. Alex Halderman, Seth D. Schoen, Nadia Heninger,...
CODES
2005
IEEE
15 years 8 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
16 years 3 months ago
Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches
On-chip L1 and L2 caches represent a sizeable fraction of the total power consumption of microprocessors. In deep sub-micron technology, the subthreshold leakage power is becoming...
Nam Sung Kim, David Blaauw, Trevor N. Mudge
ASPLOS
2010
ACM
15 years 10 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...
SIGMOD
2007
ACM
149views Database» more  SIGMOD 2007»
16 years 6 months ago
Mobile and embedded databases
Recent advances in device technology and connectivity have paved the way for next generation applications that are data-driven, where data can reside anywhere, can be accessed at ...
Anil Nori