3202 search results - page 313 / 641 » Memory access scheduling |
142
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ASAP
1997
IEEE
15 years 11 months ago
1997
IEEE
This paper introduces a powerful novel sequencer for controlling computational machines and for structured DMA (direct memory access) applications. It is mainly focused on applica...
156
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MICRO
1997
IEEE
15 years 11 months ago
1997
IEEE
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
153
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SIGCOMM
1996
ACM
15 years 10 months ago
1996
ACM
This paper describes several techniques designed to improve protocol latency, and reports on their effectiveness when measured on a modern RISC machine employing the DEC Alpha pro...
188
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ARCS
2004
Springer
15 years 10 months ago
2004
Springer
Abstract. Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption....
208
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IPPS
2010
IEEE
15 years 4 months ago
2010
IEEE
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...