Sciweavers

3202 search results - page 312 / 641
» Memory access scheduling
Sort
View
SAMOS
2007
Springer
16 years 23 days ago
High-Bandwidth Address Generation Unit
In this paper we describe an efficient data fetch circuitry for retrieving several operands from a n-bank interleaved memory system in a single machine cycle. The proposed address ...
Humberto Calderon, Carlo Galuzzi, Georgi Gaydadjie...
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
16 years 7 days ago
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
Michalis D. Galanis, Gregory Dimitroulakos, Consta...
SOFTVIS
2005
ACM
16 years 6 days ago
Adding parallelism to visual data flow programs
Programming in parallel is an error-prone and complex task compounded by the lack of tool support for both programming and debugging. Recent advances in compiler-directed shared m...
Philip T. Cox, Simon Gauvin, Andrew Rau-Chaplin
ESA
2004
Springer
166views Algorithms» more  ESA 2004»
16 years 1 days ago
Super Scalar Sample Sort
Sample sort, a generalization of quicksort that partitions the input into many pieces, is known as the best practical comparison based sorting algorithm for distributed memory para...
Peter Sanders, Sebastian Winkel
POPL
1998
ACM
15 years 11 months ago
Maximal Static Expansion
Memory expansions are classical means to extract parallelism from imperative programs. However, for dynamic control programs with general memory accesses, such transformations eit...
Denis Barthou, Albert Cohen, Jean-Francois Collard