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JOC
2010
92views more  JOC 2010»
15 years 1 months ago
Efficient Cache Attacks on AES, and Countermeasures
We describe several software side-channel attacks based on inter-process leakage through the state of the CPU's memory cache. This leakage reveals memory access patterns, whic...
Eran Tromer, Dag Arne Osvik, Adi Shamir
CCGRID
2008
IEEE
16 years 1 months ago
Enabling Interoperability among Meta-Schedulers
Grid computing supports shared access to computing resources from cooperating organizations or institutes in the form of virtual organizations. Resource brokering middleware, comm...
Norman Bobroff, Liana Fong, Selim Kalayci, Yanbin ...
EUROMICRO
1998
IEEE
15 years 11 months ago
Approaches for Scheduling of Triggered Transactions in Real-Time Active Database Systems
A real-time active database system (RTADBS) has to provide capabilities for timely trigger of timeconstrained transactions and at the same time to process them, concurrently with ...
Kam-yiu Lam, Tony S. H. Lee
ISCA
2011
IEEE
324views Hardware» more  ISCA 2011»
14 years 10 months ago
Prefetch-aware shared resource management for multi-core systems
Chip multiprocessors (CMPs) share a large portion of the memory subsystem among multiple cores. Recent proposals have addressed high-performance and fair management of these share...
Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N....
SIPS
2007
IEEE
16 years 27 days ago
Optimal Data Mapping for Motion Compensation in H.264 Video Decoding
— Long initial access cycles of SDRAM are the major performance burden of motion compensation in a video decoder. To minimize its effect while improve overall available memory ba...
Guo-Shiuan Yu, Tian-Sheuan Chang