Sciweavers

3202 search results - page 287 / 641
» Memory access scheduling
Sort
View
EMSOFT
2007
Springer
16 years 24 days ago
Exploiting non-volatile RAM to enhance flash file system performance
Non-volatile RAM (NVRAM) such as PRAM (Phase-change RAM), FeRAM (Ferroelectric RAM), and MRAM (Magnetoresistive RAM) has characteristics of both non-volatile storage and random ac...
In Hwan Doh, Jongmoo Choi, Donghee Lee, Sam H. Noh
HPCA
1998
IEEE
15 years 11 months ago
The Impact of Data Transfer and Buffering Alternatives on Network Interface Design
The explosive growth in the performance of microprocessors and networks has created a new opportunity to reduce the latency of fine-grain communication. Microprocessor clock speed...
Shubhendu S. Mukherjee, Mark D. Hill
ISCA
1997
IEEE
135views Hardware» more  ISCA 1997»
15 years 10 months ago
The Design and Analysis of a Cache Architecture for Texture Mapping
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
Ziyad S. Hakura, Anoop Gupta
IEEEPACT
2002
IEEE
15 years 11 months ago
A Framework for Parallelizing Load/Stores on Embedded Processors
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
Xiaotong Zhuang, Santosh Pande, John S. Greenland ...
WICON
2008
15 years 8 months ago
A fluid-flow model for backlog-based CSMA policies
We present a fluid flow model to analyze backlog-based CSMA policies. The model is obtained using a CSMA fixed point approximation that has been recently proposed and analyzed. We...
Atilla Eryilmaz, Peter Marbach, Asuman E. Ozdaglar