Sciweavers

3202 search results - page 277 / 641
» Memory access scheduling
Sort
View
DATE
2009
IEEE
132views Hardware» more  DATE 2009»
16 years 1 months ago
Power and performance of read-write aware Hybrid Caches with non-volatile memories
—Caches made of non-volatile memory technologies, such as Magnetic RAM (MRAM) and Phase-change RAM (PRAM), offer dramatically different power-performance characteristics when com...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yu...
ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
16 years 1 months ago
Memory mapped ECC: low-cost error protection for last level caches
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
Doe Hyun Yoon, Mattan Erez
POPL
1999
ACM
15 years 11 months ago
Typed Memory Management in a Calculus of Capabilities
An increasing number of systems rely on programming language technology to ensure safety and security of low-level code. Unfortunately, these systems typically rely on a complex, ...
Karl Crary, David Walker, J. Gregory Morrisett
IPPS
1998
IEEE
15 years 11 months ago
Pin-Down Cache: A Virtual Memory Management Technique for Zero-Copy Communication
The overhead of copying data through the central processor by a message passing protocol limits data transfer bandwidth. If the network interface directly transfers the user'...
Hiroshi Tezuka, Francis O'Carroll, Atsushi Hori, Y...
VLDB
1999
ACM
151views Database» more  VLDB 1999»
15 years 11 months ago
Cache Conscious Indexing for Decision-Support in Main Memory
As random access memory gets cheaper, it becomes increasingly affordable to build computers with large main memories. We consider decision support workloads within the context of...
Jun Rao, Kenneth A. Ross