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WMPI
2004
ACM
15 years 12 months ago
Addressing mode driven low power data caches for embedded processors
The size and speed of first-level caches and SRAMs of embedded processors continue to increase in response to demands for higher performance. In power-sensitive devices like PDAs a...
Ramesh V. Peri, John Fernando, Ravi Kolagotla
IPPS
2002
IEEE
15 years 11 months ago
MPI/IO on DAFS over VIA: Implementation and Performance Evaluation
In this paper, we describe an implementation of MPI-IO on top of the Direct Access File System (DAFS) standard. The implementation is realized by porting ROMIO on top of DAFS. We ...
Jiesheng Wu, Dhabaleswar K. Panda
HIPEAC
2010
Springer
15 years 8 months ago
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo C...
JCIT
2007
133views more  JCIT 2007»
15 years 6 months ago
Reused Page Management for Log-Structured Flash Storage Systems
Recently, a flash memory has become a major database storage in building portable information devices because of its non-volatile, shock-resistant, power-economic nature, and fast...
Changbae Roh, Siwoo Byun
IDEAS
2005
IEEE
149views Database» more  IDEAS 2005»
16 years 5 days ago
An Adaptive Multi-Objective Scheduling Selection Framework for Continuous Query Processing
Adaptive operator scheduling algorithms for continuous query processing are usually designed to serve a single performance objective, such as minimizing memory usage or maximizing...
Timothy M. Sutherland, Yali Zhu, Luping Ding, Elke...