3202 search results - page 245 / 641 » Memory access scheduling |
171
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CF
2006
ACM
16 years 16 days ago
2006
ACM
The discrete wavelet transform (DWT) is used in several image and video compression standards, in particular JPEG2000. A 2D DWT consists of horizontal filtering along the rows fo...
181
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
172
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ICPP
1994
IEEE
15 years 10 months ago
1994
IEEE
We assert that in order to perform well, a shared-memory multiprocessorinter-process communication (IPC)facility mustavoid a) accessing any shared data, and b) acquiring any locks...
209
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ISCA
1995
IEEE
15 years 10 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...
172
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DSD
2010
IEEE
15 years 6 months ago
2010
IEEE
Abstract—Resizable caches can trade-off capacity for access speed to dynamically match the needs of the workload. In Simultaneous Multi-Threaded (SMT) cores, the caching needs ca...