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INFOCOM
2009
IEEE
16 years 1 months ago
Optimal Fast Hashing
Abstract—This paper is about designing optimal highthroughput hashing schemes that minimize the total number of memory accesses needed to build and access an hash table. Recent s...
Josef Kanizo, David Hay, Isaac Keslassy
QEST
2007
IEEE
16 years 21 days ago
A Petri Net Model for Evaluating Packet Buffering Strategies in a Network Processor
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
Girish B. C., R. Govindarajan
IPPS
2006
IEEE
16 years 13 days ago
Dual-layered file cache on cc-NUMA system
CC-NUMA is a widely adopted and deployed architecture of high performance computers. These machines are attractive for their transparent access to local and remote memory. However...
Zhou Yingchao, Meng Dan, Ma Jie
WIOPT
2005
IEEE
15 years 12 months ago
A New Hybrid Scheduling Framework for Asymmetric Wireless Environments with Request Repetition
Abstract— The ever-increasing popularity of web services, growing demand for wireless multimedia and introduction of new, feature-enhanced, hand-held devices has already given bi...
Navrati Saxena, Maria Cristina Pinotti, Kalyan Bas...
FCCM
2007
IEEE
129views VLSI» more  FCCM 2007»
16 years 23 days ago
Automatic On-chip Memory Minimization for Data Reuse
FPGA-based computing engines have become a promising option for the implementation of computationally intensive applications due to high flexibility and parallelism. However, one...
Qiang Liu, George A. Constantinides, Konstantinos ...