2208 search results - page 299 / 442 » Memory Practices in the Sciences |
150
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ICC
2007
IEEE
16 years 22 days ago
2007
IEEE
A multi-cabinet implementation of a combined input and crosspoint queued (CICQ) switch introduces a large RTT latency between the line cards and switch fabric, requiring a large cr...
161
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IPPS
2007
IEEE
16 years 22 days ago
2007
IEEE
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
165
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IPPS
2007
IEEE
16 years 22 days ago
2007
IEEE
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...
149
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ISPASS
2007
IEEE
16 years 21 days ago
2007
IEEE
Recent research advocates address-correlating predictors to identify cache block addresses for prefetch. Unfortunately, address-correlating predictors require correlation data sto...
153
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VTC
2007
IEEE
16 years 20 days ago
2007
IEEE
— We design a coding scheme for Costa’s dirty paper coding (DPC) [6] using a channel and a shaping code. We show that by transforming the channel noise distribution the DPC cha...