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CODES
2005
IEEE
16 years 5 days ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
WORDS
2005
IEEE
16 years 4 days ago
A Framework for Preparing Experimental Evaluation of Rerouting Mechanisms
Since the deployment of real-time sensitive applications in the Internet, the research community has been struggling to leverage the IP best-effort networks for providing QoS assu...
Reinaldo de Barros Correia, Luiz F. Rust da Costa ...
SENSYS
2005
ACM
16 years 3 days ago
Design and deployment of industrial sensor networks: experiences from a semiconductor plant and the north sea
Sensing technology is a cornerstone for many industrial applications. Manufacturing plants and engineering facilities, such as shipboard engine rooms, require sensors to ensure pr...
Lakshman Krishnamurthy, Robert Adler, Philip Buona...
FPGA
2005
ACM
97views FPGA» more  FPGA 2005»
16 years 2 days ago
Techniques for synthesizing binaries to an advanced register/memory structure
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid
LCPC
2005
Springer
16 years 1 days ago
Manipulating MAXLIVE for Spill-Free Register Allocation
Abstract. Many embedded systems use single-chip microcontrollers which have no on-chip RAM. In such a system, the processor registers must hold all live data values. Nanocontroller...
Shashi Deepa Arcot, Henry G. Dietz, Sarojini Priya...
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