206 search results - page 28 / 42 » Mechanisms for store-wait-free multiprocessors |
159
click to vote
DAC
1996
ACM
15 years 10 months ago
1996
ACM
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
166
click to vote
PARLE
1994
15 years 10 months ago
1994
Abstract. As the disparity between processor and memory speed continues to widen, the exploitation of locality of reference in shared-memory multiprocessors becomes an increasingly...
292
click to vote
ICFP
2009
ACM
16 years 6 months ago
2009
ACM
Concurrent ML (CML) is a high-level message-passing language that supports the construction of first-class synchronous abstractions called events. This mechanism has proven quite ...
216
click to vote
RTSS
2005
IEEE
15 years 11 months ago
2005
IEEE
A key challenge for distributed real-time and embedded (DRE) middleware is maintaining both system reliability and desired real-time performance in unpredictable environments wher...
154
Voted
WDAG
2004
Springer
15 years 11 months ago
2004
Springer
The non-blocking work-stealing algorithm of Arora, Blumofe, and Plaxton (hencheforth ABP work-stealing) is on its way to becoming the multiprocessor load balancing technology of ch...