206 search results - page 10 / 42 » Mechanisms for store-wait-free multiprocessors |
149
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ICPADS
1994
IEEE
1994
IEEE
Efficient Fault Tolerance: An Approach to Deal with Transient Faults in Multiprocessor Architectures
15 years 10 months ago
Dynamic error processing approaches are an important mechanism to increase the reliability in a multiprocessor system, while making efficient use of the available resources. To th...
164
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MICRO
2006
IEEE
15 years 6 months ago
2006
IEEE
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...
166
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SIGMETRICS
2010
ACM
15 years 11 months ago
2010
ACM
We present S, the first system to provide transparent, lowoverhead application record-replay and the ability to go live from replayed execution. S i...
180
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CODES
2007
IEEE
16 years 12 days ago
2007
IEEE
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
186
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CORR
2010
Springer
15 years 6 months ago
2010
Springer
Multiprocessor task scheduling is an important and computationally difficult problem. This paper proposes a comparison study of genetic algorithm and list scheduling algorithm. Bo...