Sciweavers

1813 search results - page 304 / 363
» Mechanism Design on Trust Networks
Sort
View
GLVLSI
1998
IEEE
124views VLSI» more  GLVLSI 1998»
15 years 10 months ago
Non-Refreshing Analog Neural Storage Tailored for On-Chip Learning
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...
Bassem A. Alhalabi, Qutaibah M. Malluhi, Rafic A. ...
TON
2008
138views more  TON 2008»
15 years 6 months ago
On the performance benefits of multihoming route control
Multihoming is increasingly being employed by large enterprises and data centers to extract good performance and reliability from their ISP connections. Multihomed end networks tod...
Aditya Akella, Bruce M. Maggs, Srinivasan Seshan, ...
CASES
2008
ACM
15 years 8 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
DSN
2005
IEEE
15 years 12 months ago
Checking Array Bound Violation Using Segmentation Hardware
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
Lap-Chung Lam, Tzi-cker Chiueh
CF
2004
ACM
15 years 11 months ago
An architectural framework and a middleware for cooperating smart components
In a future networked physical world, a myriad of smart sensors and actuators assess and control aspects of their environments and autonomously act in response to it. Examples ran...
Antonio Casimiro, Jörg Kaiser, Paulo Ver&iacu...