4880 search results - page 661 / 976 » Mechanism Design by Creditability |
197
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ISCA
1996
IEEE
15 years 11 months ago
1996
IEEE
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
200
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
In recent years, several alternative devices have been proposed to deal with inherent limitation of conventional CMOS devices in terms of scalability at nanometer scale geometry. ...
193
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SP
2010
IEEE
15 years 10 months ago
2010
IEEE
—Captchas are designed to be easy for humans but hard for machines. However, most recent research has focused only on making them hard for machines. In this paper, we present wha...
180
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COMPSAC
2004
IEEE
15 years 10 months ago
2004
IEEE
ion Abstracts Zizhan Zheng, Qianxiang Wang, Gang Huang and Hong Mei. Design and Implementation of the Load Balancing Mechanism in PKUAS (in Chinese). ACTA ELECTRONICA SINICA, 32(12...
175
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INFOVIS
1995
IEEE
15 years 10 months ago
1995
IEEE
Visualizations which depict entire information spaces provide context for navigation and browsing tasks; however, the limited size of the display screen makes creating effective g...