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» Measuring the Performance of Real-Time Systems
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IEEEPACT
2008
IEEE
16 years 26 days ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
GLOBECOM
2006
IEEE
16 years 15 days ago
Packet Delay-Aware Scheduling in Input Queued Switches
Abstract— Virtual Output Queuing is widely used by highspeed packet switches to overcome head-of-line blocking. This is done by means of matching algorithms. In fixed-length VOQ...
Yihan Li, Shivendra S. Panwar, H. Jonathan Chao, J...
ISCA
2006
IEEE
133views Hardware» more  ISCA 2006»
16 years 14 days ago
TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time
RAID architectures have been used for more than two decades to recover data upon disk failures. Disk failure is just one of the many causes of damaged data. Data can be damaged by...
Qing Yang, Weijun Xiao, Jin Ren
JCDL
2005
ACM
100views Education» more  JCDL 2005»
16 years 12 hour ago
What's there and what's not?: focused crawling for missing documents in digital libraries
Some large scale topical digital libraries, such as CiteSeer, harvest online academic documents by crawling open-access archives, university and author homepages, and authors’ s...
Ziming Zhuang, Rohit Wagle, C. Lee Giles
EMSOFT
2004
Springer
15 years 12 months ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande